IEC TR 62240-2:2026 focuses on original equipment manufacturers (OEMs) using commercial off the shelf (COTS) semiconductor microcircuits for high performance, high reliability and long duration applications. This document supports OEMs in the preparation and maintenance of their semiconductor electronic component management plan (ECMP).
IEC TR 62240-2:2026 describes a process and a method for selecting digital semiconductor microcircuits by ensuring that their lifetime is compatible with the requirements of aerospace, defence and high performance (ADHP) applications (generally in connection with functional environments). Methods and guidelines are provided to assess the long-term reliability of COTS semiconductor microcircuits in such applications; they mainly apply during the electronic design phase when selecting semiconductor microcircuits and assessing the application reliability.
Moreover, this document focuses on the intrinsic wear-out and the lifetime of COTS semiconductor microcircuits processed of less than or equal to 90 nm feature size (also called deep sub-micron (DSM) semiconductor microcircuits) and puts aside, at this time, packaging wear-out and random failure mechanisms. In this view, physics of failure (PoF) is at the heart of the approach.
This edition includes the following significant technical changes with respect to the previous edition:
a) introduction of an additional alternative path and approach where lifetime is assessed by the original component manufacturer based on user or original equipment manufacturer microcircuit mission profile;
b) update of Figure 1 with regard to the introduction of the additional alternative path & approach;
c) removal of the mention of SiC & GaN technologies from the considerations in 4.2.2 as the Scope indicates that the principles (process and method) described in this document can be applied to all types of semiconductor technologies.
