Објављен
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
ОБЈАВЉЕН
IEC 63011-1:2018 ED1
60.60
Стандард објављен
28. 11. 2018.