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IEC 63011-1:2018 ED1

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
28. 11. 2018.

Опште информације

60.60     28. 11. 2018.

IEC

TC 47/SC 47A

Međunarodni standard

31.200  

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Jezik na kome želite da primite dokument.

Apstrakt

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.

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TRENUTNO

OBJAVLJEN
IEC 63011-1:2018 ED1
60.60 Standard objavljen
28. 11. 2018.