IEC 63378-6:2026 specifies a thermal resistance and capacitance model for semiconductor packages. This model is named the digital transformation using thermal resistance and capacitance (DXRC) model. It predicts transient temperature at junction and measurement points.
This document applies to semiconductor packages such as TO-252, TO-263, and HSOP. It supports single chip packages dissipated heat from single package surface.
PROJEKAT
naSRPS EN IEC 63378-6:2023
40.60
Završetak javne rasprave
25. 7. 2025.