This part of IEC 63275-1 gives a test method to evaluate gate threshold voltage shift of silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) using room temperature readout after applying continuous positive gate-source voltage stress at elevated temperature. The proposed method accepts a certain amount of recovery by allowing large delay times between stress and measurement (up to 10h).
NAPUŠTEN
delSRPS EN IEC 63275-1:2021
40.98
Projekat se briše iz plana rada komisije za standarde
26. 5. 2021.